DFT Engineer

Professional Summary

We are seeking a qualified Design for Test (DFT) / DFx Engineer to join our engineering team at MSI. This role focuses on implementing, verifying, and delivering advanced silicon test structures, including SCAN, MBIST, and IJTAG architectures. The ideal candidate will bring extensive hands-on experience with Siemens DFT tools and silicon test feature verification.

Key Responsibilities

• Execute DFT insertion for SCAN (with SSN) and MBIST structures.
• Perform MBIST Repair implementation and end-to-end verification.
• Generate key collaterals for Test Timing and Place & Route (P&R).
• Apply deep expertise in IEEE 1687 IJTAG standards, working directly with ICL and PDL standard specifications.
• Verify comprehensive DFT features including Boundary Scan, JTAG, SCAN, MBIST, and High-Speed IO (HSIO).

Technical Requirements (Must-Have)

• Experience: 3+ years of experience in DFT / DFx engineering.
• Methodologies: Strong proficiency in DFT / DFx methodologies and workflows.
• EDA Tools: Hands-on familiarity with the Siemens suite of DFT tools (e.g., Tessent).
• Architectures: Expertise in SCAN insertion (including SSN) and MBIST insertion/repair.
• Standards: Deep understanding of IJTAG IEEE 1687, ICL, and PDL standards.
• Verification: Demonstrated capability in feature verification for JTAG, Boundary Scan, SCAN, MBIST, and High-Speed IO.

Desired Skills (Nice-to-Have)

• Experience with Automatic Test Pattern Generation (ATPG).

Position Details

• Position Type: Full-Time Employee (FTE)
• Location: Santa Clara, CA (Onsite)